Gaya APA
UYEMURA, John P. (2006).
Chip design for sub micron VLSI:CMOS layout and simulation .
Australia:
Thomson.
Gaya Chicago
UYEMURA, John P.
Chip design for sub micron VLSI:CMOS layout and simulation.
Australia:
Thomson,
2006.
Monograf.
Gaya MLA
UYEMURA, John P.
Chip design for sub micron VLSI:CMOS layout and simulation.
Australia:
Thomson,
2006.
Monograf.
Gaya Turabian
UYEMURA, John P.
Chip design for sub micron VLSI:CMOS layout and simulation.
Australia:
Thomson,
2006.
Monograf.